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±15kV ESD-Protected Touch-Screen
Controllers Include DAC and Keypad Controller
Bits 1-3: Touch-Screen Settling Time Control
These bits specify the time delay from pen-touch detec-
tion to a conversion start. This allows the selection of the
appropriate settling time for the touch screen being used.
Table 11 shows how to set the settling time. These bits
are identical, regardless of read or write.
Bit 0: ADC Internal Reference Voltage Control
This bit selects the ADC internal reference voltage,
either +1.0V or +2.5V. This bit is identical, regardless of
read or write. The reference control bit is shown in
Table 12.
Table 11. Touch-Screen Settling Time
Control*
Internal ADC Reference Power-Down Control
The ADC control register controls the power setting of
the internal ADC reference. Zeros must be written to
bits A/D3–A/D0 to control internal reference power-up
followed by the appropriate logic at the RES1 and RES0
bits. Table 13 shows the internal ADC reference power-
down control.
DAC Control Register
The MSB in this control register determines the power-
down control of the on-board DAC. Table 14 shows the
DAC control register. Writing a zero to bit 15 (DAPD)
powers up the DAC, while writing a 1 powers down the
DAC. Table 15 describes the DAC control register con-
tents, while Table 16 shows the DAC power-down bit.
Keypad Control Registers
The keypad control register, keypad mask register, and
ST2
0
0
0
0
1
1
ST1
0
0
1
1
0
0
ST0
0
1
0
1
0
1
SETTLING TIME
Settling time: 0μs
Settling time: 100μs
Settling time: 500μs
Settling time: 1ms
Settling time: 5ms
Settling time: 10ms
keypad column mask control register control the key-
pad scanner in the MAX1233/MAX1234. The keypad
control register (Table 17) controls scanning and
debouncing, while the keypad mask register (Table 22)
and the keypad column mask control register (Table 24),
Table 15. DAC Control Register
Descriptions
1
1
1
1
0
1
Settling time: 50ms
Settling time: 100ms
BIT
15 (MSB)
NAME
DAPD
DESCRIPTION
DAC powered down
*Applicable only for X, Y, Z1, and Z2 measurements.
[14:0]
0
Reserved
Table 12. ADC Reference Control Bit
Table 16. DAC Power-Down Bit
RFV
0
1
FUNCTION
+1.0V reference
+2.5V reference
DAPC
0
1
FUNCTION
DAC powered up
DAC powered down
Table 13. Internal ADC Reference Auto Power-Up Control
[A/D3:A/D0]
0000
0000
0000
0000
RES1
0
0
1
1
RES0
0
1
0
1
ADC REFERENCE
SOURCE
Internal
Internal
External
External
ADC REFERENCE POWER MODE
Power up, wait for reference to settle, and power down again for
each temperature, battery, or auxiliary scan (auto power-up mode)
Always powered up
Always powered down
Always powered down
Table 14. DAC Control Register (Write 0x0042/Read 0x8042)
BIT15
DAPD
BIT14
0
BIT13
0
BIT12
0
BIT11
0
BIT10
0
BIT9
0
BIT8
0
BIT7
0
BIT6
0
BIT5
0
BIT4
0
BIT3
0
BIT2
0
BIT1
0
BIT0
0
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